Towards Provably-Secure Analog and Mixed-Signal Locking Against Overproduction

Similar to digital circuits, analog and mixed-signal (AMS) circuits are also susceptible to supply-chain attacks such as piracy, overproduction, and Trojan insertion. However, unlike digital circuits, supply-chain security of AMS circuits is less explored. In this work, we propose to perform “logic locking” on digital section of the AMS circuits. The idea is to make the analog design intentionally suffer from the effects of process variations, which impede the operation of the circuit. Only on applying the correct key, the effect of process variations are mitigated, and the analog circuit performs as desired. We provide the theoretical guarantees of the security of the circuit, and along with simulation results for the band-pass filter, low-noise amplifier, and low-dropout regulator, we also show experimental results of our technique on a band-pass filter

Trends in Analogic Design: Highly Reconfigurable Filters, Performance Optimization and IP Protection

The continuous technology scaling and rapid growth of applications involving a vast and diverse network of interconnected devices increase analog integrated circuit (IC) design complexity. This work addresses three main trends of analog IC design: highly reconfigurable power-efficient analog circuits, automatic IC design for performance optimization, and analog IP protection against security threats. The first part of this dissertation discusses the synthesis and design methodology of high-order and frequency-tunable low-pass active-R filter architectures for multi-standard wireless applications. Active-R filters use the inherent integrator-like behavior of amplifiers to realize their frequency response. The main advantages of this type of filter are high-frequency performance and a low integrated area since the only capacitor they require is the Miller capacitor used in internally compensated amplifiers. In this work, amplifiers with configurable unity-gain frequencies enable the continuous tuning of active-R filters. Three different filter architectures realize a fifth-order Butterworth prototype tunable in the 1--50~MHz frequency range. The second part of this dissertation discusses the development of a computationally low-cost surrogate model for multi-objective optimization-based automated analog IC design. The surrogate has three main components: a set of Gaussian process regression models of the technology's parameters, a physics-based model of the MOSFET device, and a set of equations of the performance metrics of the circuit under design. The surrogate model is inserted into two different state-of-the-art optimization algorithms to prove its flexibility. The efficacy of our surrogate is demonstrated through simulation validation across process corners in three different CMOS technologies, using three representative circuit building-blocks that are commonly encountered in mainstream analog/RF ICs. Finally, this dissertation presents an overview of analog IP security, including the threat models, protection techniques, and reported attacks. A novel Schmitt-trigger based key provisioning technique is proposed for increasing the security level of existing IP protection techniques. This approach has a very small area overhead that remains constant and independent of the key size. Moreover, it consumes power only at power-up